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Introduction

Version: 0.1pre

LogiSpim is a 32-bit MIPS processor built in Logisim-Evolution with associated tooling for running single-file MIPS programs on the processor. This has been created as a tool to help in learning pipelining in MIPS processors, and to offer a more in-depth experience in an introduction to micro-architecture. The ISA implementation was inspired by this MIPS data sheet.

Features

  • Assistive program for compiling and viewing MIPS instructions programs.
  • Detailed documentation of micro-architecture for improved learning and understanding.
  • Pipeline status view to easily display which instructions are in which parts of the pipeline at any given moment.
  • Support for emulated console output through syscalls.
  • Built-in breakpoint feature for debugging.

⚠️ Important Notice

This website and project is currently under construction. Progress is being made, and will eventually be released, once a satisfactory amount of work has been done. Expected Release around late April 2026.

Supported Instructions

The instruction set implemented in this processor was based on this MIPS reference sheet.

Note: This CPU currently does NOT support floating point operations.

OP/Funct I-Type & J-Type Instructions R-Type Instructions
# Binary
0 0000 00
1 0000 01
2 0000 10
3 0000 11
4 0001 00
5 0001 01
6 0001 10
7 0001 11
8 0010 00
9 0010 01
10 0010 10
11 0010 11
12 0011 00
13 0011 01
14 0011 10
15 0011 11
16 0100 00
17 0100 01
18 0100 10
19 0100 11
20 0101 00
21 0101 01
22 0101 10
23 0101 11
24 0110 00
25 0110 01
26 0110 10
27 0110 11
28 0111 00
29 0111 01
30 0111 10
31 0111 11
32 1000 00
33 1000 01
34 1000 10
35 1000 11
36 1001 00
37 1001 01
38 1001 10
39 1001 11
40 1010 00
41 1010 01
42 1010 10
43 1010 11
44 1011 00
45 1011 01
46 1011 10
47 1011 11
48 1100 00
49 1100 01
50 1100 10
51 1100 11
52 1101 00
53 1101 01
54 1101 10
55 1101 11
56 1110 00
57 1110 01
58 1110 10
59 1110 11
60 1111 00
61 1111 01
62 1111 10
63 1111 11
Name Note
R-Type See Table
j Implemented
jal Implemented
beq Implemented
bne Implemented
blez Implemented
bgtz Implemented
addi Implemented
addiu Implemented
slti Implemented
sltiu Implemented
andi Implemented
ori Implemented
xori Implemented
lui Implemented
F-Type Not Yet Implemented
lb Implemented
lh Implemented
lwl Implemented
lw Implemented
lbu Implemented
lhu Implemented
lwr Implemented
sb Implemented
sh Implemented
swl Implemented
sw Implemented
swr Implemented
cache Not Yet Implemented
ll Not Yet Implemented
lwc1 Not Yet Implemented
lwc2 Not Yet Implemented
pref Not Yet Implemented
ldc1 Not Yet Implemented
ldc2 Not Yet Implemented
sc Not Yet Implemented
swc1 Not Yet Implemented
swc2 Not Yet Implemented
sdc1 Not Yet Implemented
sdc2 Not Yet Implemented
Name Note
sll Implemented
srl Implemented
sra Implemented
sllv Implemented
srlv Implemented
srav Implemented
jr Implemented
jalr Implemented
movz Not Yet Implemented
movn Not Yet Implemented
syscall Implemented*
break Not Yet Implemented
sync Not Yet Implemented
mfhi Implemented
mthi Implemented
mflo Implemented
mtlo Implemented
mult Implemented
multu Implemented
div Implemented
divu Implemented
add Implemented
addu Implemented
sub Implemented
subu Implemented
and Implemented
or Implemented
xor Implemented
nor Implemented
slt Implemented
sltu Implemented
tge Not Yet Implemented
tgeu Not Yet Implemented
tlt Not Yet Implemented
tltu Not Yet Implemented
teq Not Yet Implemented
tne Not Yet Implemented

* The syscall instruction has a move $k0, $ra instruction inserted prior to it by the pre-processor. This is done to allow for syscall to preserve the value in $ra, since syscall acts similarly to a jal instruction; despite the convention placing the responsibility of preserving the content of $ra on the callee. Future improvements may remove the need for this additional instruction's insertion.